TX Datapath

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)

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1.5 English

The TX datapath is composed of the following:

The serializer supports 8:1, 4:1, and 2:1 serialization. This is set by the TX_DATA_WIDTH attribute.
Output Delay
Output delays can delay outgoing serialized data up to 512 taps (0–511 taps), with a minimum of 625 ps of available delay.

Refer to the Controlling Tristate Control section for latencies with and without the TX datapath using tristate control.