XP IOB IBUFDISABLE

Several input and bidirectional primitives have an IBUFDISABLE port that can disable the input buffer and force the O output of the internal logic to a logic Low when the IBUFDISABLE signal is asserted High. The USE_IBUFDISABLE attribute must be set to TRUE, the IBUFDISABLE port must be controlled, and the SIM_DEVICE attributes (for example, VERSAL_PRIME and VERSAL_AI_CORE) appropriately set for this primitive to have the expected behavior that is specific to the Versal architecture. This feature can be used to reduce power at times when the I/O is idle.