Supply Voltages and Dedicated SelectIO Pins

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)

Document ID
AM010
Release Date
2024-03-18
Revision
1.5 English

VCCO

The VCCO supply is the primary power supply for drivers and termination. The XP IOB Supported Standards and HD IOB Supported Standards sections include tables that outline the VCCO requirements for each of the supported I/O standards, and illustrate the VCCO requirements for inputs and outputs including the optional internal differential termination circuit. All VCCO pins for a given XPIO, or HDIO bank must be connected to the same external voltage supply on the board, and as a result, all of the I/O within a given I/O bank must be compatible with the same VCCO level. The VCCO voltage must match the requirements for the I/O standards that have been assigned to the I/O bank.

CAUTION:
Incorrect VCCO voltages can result in loss of functionality or damage the device.

VCCAUX

The global auxiliary (VCCAUX) supply rail primarily provides power to the receive circuitry. In the I/O banks, VCCAUX is also used to power input buffer circuits for some of the I/O standards. Additionally, the VCCAUX rail provides power to the differential input buffer circuits used for most of the differential and VREF I/O standards.

VCC_IO

VCC_IO is an internal supply for I/O banks. It supplies the digital portions and supporting logic SelectIO resources.

IO_VR

The IO_VR pin is used to calibrate on-die termination to a reference resistor on the PCB. For example, bank 700 has a IO_VR pin in bank 700 called IO_VR_700. Some devices can have multiple banks with IO_VR pins. For example banks 800, 723, and 823 are present in some larger stacked silicon interconnect (SSI) technology devices. All IO_VR pins must be externally connected to a 240Ω resistor on the PCB and pulled up to the bank VCCO voltage. See Calibrated Termination (Digitally Controlled Impedance). HD I/O banks do not support calibrated termination and thus no equivalent pin or reference resistor is required on HD I/O banks.

Important: All IO_VR must have an external 240Ω resistor tied to the bank VCCO. These pins are dedicated and cannot be used as user I/O. All designs MUST populate these pins appropriately, regardless of the I/O standards used in a design.

Power Supply Sequencing Requirements

The power supply requirements, including power-on and power-off sequencing, are described in Versal adaptive SoC data sheets.