Single-Ended Input Buffer Primitives

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)

Document ID
AM010
Release Date
2024-03-18
Revision
1.5 English
Figure 1. Single-Ended Input Buffer Primitives

Table 1. IBUF and IBUF_INTERMDISABLE Attributes
Attribute Values Description
IOSTANDARD See HD IOB Supported Standards Assigns an I/O standard to the element.
USE_IBUFDISABLE FALSE IBUFDISABLE is not supported in HD IOB and must be set to FALSE. (IBUF_INTERMDISABLE only)
Table 2. IBUF and IBUF_INTERMDISABLE Ports
Port I/O Description
O Output Buffer output representing the input path to the device.
I Input Input port connection. Connect directly to top-level port in the design.
IBUFDISABLE Input The IBUFDISABLE pin can disable the input buffer and force the O output to the internal logic to a logic High when the IBUFDISABLE signal is asserted High. (IBUF_INTERMDISABLE only)
INTERMDISABLE Input IBUFDISABLE is not supported in HD IOB. (IBUF_INTERMDISABLE only)