I/O Banking Rules

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)

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1.5 English

In the Versal architecture, XPIO and HDIO IOBs use the bank VCCO supply for drivers, on-die biasing, on-die termination, and the receive block. Because of the dependency on VCCO, all outputs and many inputs must operate at a specific VCCO level making it a dominant factor in determining the IOSTANDARDS that can reside in the same bank.

Rules for Combining Standards Different Standards in the Same Bank

  • VCCO levels must be compatible for all inputs and outputs in the same HDIO and XPIO I/O bank
  • INTERNAL_VREF levels must be compatible for all inputs in the same HDIO and XPIO bank
Note: In Versal devices, all single-ended input and all output (single-ended and differential) IOSTANDARDS have a required VCCO level. Only the differential inputs that do not use ODT, PULLTYPE, or DIFF_TERM can reside in multiple VCCO domains. Although a differential input may be compatible with multiple VCCO domains, it is important to note that data sheet input specifications are impacted by the VCCO level and compatibility should verified when selecting a VCCO level.

The supported standards and their associated VCCO and INTERNAL_VREF requirements are described in the XPIO, HDIO, X5IO IOB supported standards sections.