Controlling Serial Mode

Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)

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1.5 English

To use serial mode, set SERIAL_MODE = TRUE. In addition:

  • Nibbles with SERIAL_MODE = TRUE can be used as RX-only, TX-only, or RX + TX. Serial mode does not supported mixed mode and bidirectional interfaces. Note that the TX functionality is unaffected by using serial mode.
  • EN_VTC must be grounded
  • If RX_DATA_WIDTH = 2 (1:2 deserialization): BISC must be disabled by setting SELF_CALIBRATE = DISABLE
  • Because no strobe is accompanying the incoming data, a different clock must be used to capture data. Serial mode takes the PLL_CLK input and generates its own capture clock. Because PLL_CLK is not phase-related to the data, the application must have a way of determining the clock-to-data phase relationship.
  • Inter-nibble and inter-byte clocking are not supported. The associated attributes should be set accordingly (EN_CLK_TO_LOWER = DISABLE, EN_CLK_TO_UPPER = DISABLE, EN_OTHER_PCLK = FALSE, EN_OTHER_NCLK = FALSE)