Example 3: Trigger Command Transmission from D-PHY TX (Master) Side - 4.3 English

This section describes trigger transmission operation.

1. txrequestesc is asserted along with the trigger value in txtriggeresc[3:0].
2. Because the PPI does not have a handshake signal to report back the trigger transmission on the serial line, txrequestesc is driven Low after 30 txclkesc clock cycles. The 30 clock cycles ensures that the MIPI D-PHY TX core transfers the trigger command on the serial line.

The following figure shows the trigger transmission operation.