Device architecture within BITSLICE and BITSLICE_CONTROL allows the user to propagate the
Strobe between byte groups by using additional IO pin(s) internally. Additional pin
usage for Strobe propagation depends on the RX clock lane IO (Strobe) selection along
with RX data lane IO selection.
Note: Strobe propagation is not applicable if DBC pin is
selected as RX clock lane IO.
The following table provides the scenarios for additional IO realization by
HSSIO IP wizard for Strobe propagation. This pin(s) are generated with
bg<>_pin<>_nc name. N pins are not shown in the
following table for simplicity.
| Byte Group | T1L_0 as RX Clock Lane IO | T1U_6 as RX Clock Lane IO | T2L_0 as RX Clock Lane IO | T2U_6 as RX Clock Lane IO |
|---|---|---|---|---|
| T3U_10 | Selecting this IO forces bg2_pin0_nc and bg3_pin0_nc use | Selecting this IO forces bg2_pin6_nc and bg3_pin6_nc use | Selecting this IO forces bg3_pin0_nc use | Selecting this IO forces bg3_pin6_nc use |
| T3U_8 | Selecting this IO forces bg2_pin0_nc and bg3_pin0_nc use | Selecting this IO forces bg2_pin6_nc and bg3_pin6_nc use | Selecting this IO forces bg3_pin0_nc use | Selecting this IO forces bg3_pin6_nc use |
| T3U_6 | Selecting this IO forces bg2_pin0_nc and bg3_pin0_nc use | bg3_pin6_nc are inferred by using this IO | Selecting this IO forces bg3_pin0_nc use | bg3_pin6_nc are inferred by using this IO |
| T3L_4 | Selecting this IO forces bg2_pin0_nc and bg3_pin0_nc use | Selecting this IO forces bg2_pin6_nc and bg3_pin6_nc use | Selecting this IO forces bg3_pin0_nc use | Selecting this IO forces bg3_pin6_nc use |
| T3L_2 | Selecting this IO forces bg2_pin0_nc and bg3_pin0_nc use | Selecting this IO forces bg2_pin6_nc and bg3_pin6_nc use | Selecting this IO forces bg3_pin0_nc use | Selecting this IO forces bg3_pin6_nc use |
| T3L_0 | bg3_pin0_nc are inferred by using this IO | Selecting this IO forces bg2_pin6_nc and bg3_pin6_nc use | bg3_pin0_nc are inferred by using this IO | Selecting this IO forces bg3_pin6_nc use |
| T2U_10 | Selecting this IO forces bg2_pin0_nc use | Selecting this IO forces bg2_pin6_nc use | Same Byte Group | Same Byte Group |
| T2U_8 | Selecting this IO forces bg2_pin0_nc use | Selecting this IO forces bg2_pin6_nc use | Same Byte Group | Same Byte Group |
| T2U_6 | Selecting this IO forces bg2_pin0_nc use | bg2_pin6_nc are inferred by using this IO | Same Byte Group | RX Clock Lane IO |
| T2L_4 | Selecting this IO forces bg2_pin0_nc use | Selecting this IO forces bg2_pin6_nc use | Same Byte Group | Same Byte Group |
| T2L_2 | Selecting this IO forces bg2_pin0_nc use | Selecting this IO forces bg2_pin6_nc use | Same Byte Group | Same Byte Group |
| T2L_0 | bg2_pin0_nc are inferred by using this IO | Selecting this IO forces bg2_pin6_nc use | RX Clock Lane IO | Same Byte Group |
| T1U_10 | Same Byte Group | Same Byte Group | Selecting this IO forces bg1_pin0_nc use | Selecting this IO forces bg1_pin6_nc use |
| T1U_8 | Same Byte Group | Same Byte Group | Selecting this IO forces bg1_pin0_nc use | Selecting this IO forces bg1_pin6_nc use |
| T1U_6 | Same Byte Group | RX Clock Lane IO | Selecting this IO forces bg1_pin0_nc use | bg1_pin6_nc are inferred by using this IO |
| T1L_4 | Same Byte Group | Same Byte Group | Selecting this IO forces bg1_pin0_nc use | Selecting this IO forces bg1_pin6_nc use |
| T1L_2 | Same Byte Group | Same Byte Group | Selecting this IO forces bg1_pin0_nc use | Selecting this IO forces bg1_pin6_nc use |
| T1L_0 | RX Clock Lane IO | Same Byte Group | bg1_pin0_nc are inferred by using this IO | Selecting this IO forces bg1_pin6_nc use |
| T0U_10 | Selecting this IO forces bg0_pin0_nc use | Selecting this IO forces bg0_pin6_nc use | Selecting this IO forces bg0_pin0_nc and bg1_pin0_nc use | Selecting this IO forces bg0_pin6_nc and bg1_pin6_nc use |
| T0U_8 | Selecting this IO forces bg0_pin0_nc use | Selecting this IO forces bg0_pin6_nc use | Selecting this IO forces bg0_pin0_nc and bg1_pin0_nc use | Selecting this IO forces bg0_pin6_nc and bg1_pin6_nc use |
| T0U_6 | Selecting this IO forces bg0_pin0_nc use | bg0_pin6_nc are inferred by using this IO | Selecting this IO forces bg0_pin0_nc and bg1_pin0_nc use | bg0_pin6_nc are inferred by using this IO |
| T0L_4 | Selecting this IO forces bg0_pin0_nc use | Selecting this IO forces bg0_pin6_nc use | Selecting this IO forces bg0_pin0_nc and bg1_pin0_nc use | Selecting this IO forces bg0_pin6_nc and bg1_pin6_nc use |
| T0L_2 | Selecting this IO forces bg0_pin0_nc use | Selecting this IO forces bg0_pin6_nc use | Selecting this IO forces bg0_pin0_nc and bg1_pin0_nc use | Selecting this IO forces bg0_pin6_nc and bg1_pin6_nc use |
| T0L_0 | bg0_pin0_nc are inferred by using this IO | Selecting this IO forces bg0_pin6_nc use | bg0_pin0_nc are inferred by using this IO | Selecting this IO forces bg0_pin6_nc and bg1_pin6_nc use |