The MIPI D-PHY Controller is tested in hardware for functionality, performance, and reliability using AMD evaluation platforms. The MIPI D-PHY Controller verification test suites for all possible modules are continuously being updated to increase test coverage across the range of possible parameters for each individual module.
A series of MIPI D-PHY Controller test scenarios are validated using the AMD Zynq™ UltraScale+™ MPSoC ZCU102 development board. This board allows the prototyping of system designs where the MIPI D-PHY Controller is used for high-speed serial communication between two boards.
7 series FPGAs do not have native MIPI IOB support: target the HP/HR IO bank for 7 series FPGAs and the XPIO bank for AMD Versal™ devices.For more information, refer to D-PHY Solutions (XAPP894).
A series of interoperability test scenarios are listed in the following table that are validated using different core configurations and resolutions.
Sensor | Board/Device | Tested Configuration | Resolution |
---|---|---|---|
Omnivision OV13850 | ZCU102/xczu9eg-ffvb1156-2-i-es2 |
|
480p@60 fps, 720p@60 fps, 1080p@60 fps, 4k@30 fps |
Sony IMX274 | ZCU102/xczu9eg-ffvb1156-2-i-es2 |
|
All supported modes by sensor |
Sony IMX224 | ZCU102/xczu9eg-ffvb1156-2-i-es2 |
|
All-pixel (QVGA) and Window cropping modes |
Sony IMX274 | ZC702/xc7z020clg484-1 |
|
1080p@60 fps |
Sensor | Board/Device | Tested Configuration | Resolution |
---|---|---|---|
B101UAN01.7 | ZCU102/xczu9eg-ffvb1156-2-e |
|
1920x1200@60 fps |