Case 2: UltraScale+ Device MIPI D-PHY RX Core - 4.3 English

MIPI D-PHY LogiCORE IP Product Guide (PG202)

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4.3 English

The following figure shows the sharable resource connections from the MIPI D-PHY RX core with shared logic included (DPHY_RX_MASTER) to the instance of another MIPI D-PHY RX core without shared logic (DPHY_RX_SLAVE).

Figure 1. Shared Logic Example for MIPI D-PHY RX Core