Example 1: Creating an Implementation Target - 2024.2 English - UG1483

Vitis Model Composer User Guide (UG1483)
Document ID
UG1483
Release Date
2025-02-03
Version
2024.2 English
  1. In the MATLAB® Command Window, enter the following command:
    xilinx.environment.addCompilationTarget('Impl', 'demo')

    This provides a template derived class in the demo folder for you to edit.

  2. Open the newly created file demo\Impl\@Impl\Impl.m in the MATLAB Editor.
  3. Populate the setup_sysgen_token() function as per the requirements. Using this approach, you can control how the Model Composer Hub block should look, including the enabled/disabled fields when the user-defined custom compilation is selected.

  4. Save Impl.m.
  5. In the MATLAB Current Folder browser, right-click the demo folder and select Add To Path > Selected Folder and Subfolders.
  6. In the MATLAB Command Window, enter the following command:
    xilinx.environment.rehashCompilationTarget

    This ensures that the updated class definition of Impl is used.

  7. Open the Model Composer Hub block in your model.
  8. On the Settings pane of your HDL subsystem, ensure Verilog is selected as the Target Language.
  9. Under Implementation Strategy, select Flow_Quick.
  10. All the user-specified files and additional Tcl commands to be run are known before the Vivado IDE project is created. The next step is to populate the pre_project_creation() function as indicated in the following figure.

  11. In the MATLAB Command Window, enter the following command:
    xilinx.environment.rehashCompilationTarget

    This ensures that the updated class definition of Impl is used.

  12. Close and then re-open the Model Composer Hub block.
  13. Select Flow_Quick from the list of Implementation strategies.
  14. On the Export tab, select Impl as the Export Type.
  15. Click Export. When the process is finished, you can see the implementation results by opening the Vivado IDE project.