HLS Kernel to AIE - 2024.1 English

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2024-05-30
Version
2024.1 English

The HLS Kernel to AIE block reformats a signal driven by a port of an HLS kernel block, so that the resulting signal matches the data type and complexity required by an AI Engine kernel or an input of a AI Engine graph block. For example, if the data type of port of the HLS kernel block is axiu<128> and the data type of the port of the AI Engine is uint32, the HLS Kernel to AIE block reformats the input samples by unpacking each axisu<128> sample into four uint32 samples. The output port of this block is a variable-size signal.

Figure 1. HLS Kernel to AIE Block

Double-click the block symbol to see the parameters of the HLS Kernel to AIE block. For more information refer to HLS to AIE.

Figure 2. Block Parameters: HLS Kernel to AIE
AIE Input Type
Possible values are: int8, int16, int32, int64, uint8, uint16, uint32, uint64, cint16, cint32, float, cfloat, bfloat16.
Output Size
The size of the output port. The output port is a variable-sized signal whose maximum size is specified by the Output Size parameter. Default size is '1'.