Language Selection - 2024.1 English

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2024-05-30
Version
2024.1 English

The black box can import VHDL and Verilog modules. SysgenBlockDescriptor provides a method, setTopLevelLanguage, that tells the black box what type of module you are importing. This method should be invoked once in the configuration M-function. The following code shows how to select between the VHDL and Verilog languages.

VHDL Module:

this_block.setTopLevelLanguage('VHDL'); 

Verilog Module:

this_block.setTopLevelLanguage('Verilog'); 
Note: The Configuration Wizard automatically selects the appropriate language when it generates a configuration M-function.