When you complete the verification in Vitis Model Composer, you can package the design for use in IP integrator.
The HDL subsystem must first be configured to use Export Type of IP
Catalog. This compilation type will consolidate all hardware source created
from Vitis Model Composer (RTL + IP + Constraints)
into an IP. In addition, you can also use the button to the right of the
Export Type drop-down menu
to change the information that goes along with the IP. In this case, the default values
shown below are used.
When you click the Export button in the Vitis Model Composer Hub block, the RTL code is generated and packaged along with constraints into an IP.