Vitis Model Composer Hub Block for AI Engine Code Generation - 2022.1 English

Vitis Model Composer User Guide (UG1483)
Document ID
UG1483
Release Date
2022-05-26
Version
2022.1 English

Model Composer automatically generates AI Engine code (dataflow graph) from the subsystem that comprises blocks from the AI Engine Blockset library. However, an AI Engine model in Model Composer requires the addition of the Vitis Model Composer Hub block to configure compilation and generation of AI Engine output. In addition to the targets available in the Hub block which supports compilation of the design into low-level representations using blocks from the library, it also supports an AI Engine compilation target.

This section discusses only the graph code generation from Model Composer. For running and verifying the generated AI Engines code, refer to Verification of AI Engine Code.

The Hub block and the Block Parameters dialog box specific to AI Engine compilation targets are shown in the following figure.

Figure 1. Model Composer Hub and Parameters

Add the Hub block from the library, and configure the AI Engine subsystem and settings as shown in the previous figure. For more details about adding the Model Composer Hub block into the design and associated features, refer to Vitis Model Composer Hub. The Subsystem name field should be given the top-level subsystem module name.

You can specify a cell array of AI Engine compiler options using the Compiler Options edit button. This provides a method to control the compiler debug options, execution target options, file options and so on. Examples as follows:
  • To control the debug option log-levels, you can specify the string {'--log-level=5'} in the Compiler Options field.
  • For issues related to the stack size or heap size in the downstream AI Engine flows, you can increase the size by adding --stacksize=<int> and --heapsize=<int> in the Compiler options field.
When the Code directory, specified in the Hardware tab, Subsystem name, and Target Hardware are specified, click Generate to create the dataflow graph.
Important: You can enable the Create testbench option to log the test data at input and output. Further, you can enable the Run AIE Simulation option to verify the dataflow graph. For more information, refer to Verification of AI Engine Code.

Code generation begins when you click the Generate button in the Generate tab.

Once the code generation process is initiated, the Progress window may display (based on whether the imported kernel/graph code is pre-compiled or not). If the design was already compiled during the Simulink simulation phase, you may not see this window. However, Model Composer displays the progress of code generation in the Progress window.

When Vitis Model Composer has completed generating the code, it displays the status message Done code generation in the Progress window as shown in the following figure.

Figure 2. Done Code Generation
Tip: Model Composer runs the Simulink simulation every time you try to generate the code. You can choose to either run the simulation manually or click Generate which validates the subsystem by running a set of DRCs. If the DRC validation fails, then Model Composer returns an appropriate error and the code generation process stops.