Reset Generator - 2022.1 English

Vitis Model Composer User Guide (UG1483)

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2022.1 English

The Reset Generator block captures the user's reset signal that is running at the system sample rate, and produces one or more downsampled reset signal(s) running at the rates specified on the block.

The downsampled reset signals are synchronized in the same way as they are during startup. The RDY output signal indicates when the downsampled resets are no longer asserted after the input reset is detected.

Block Parameters

The block parameters dialog box shown below can be invoked by double-clicking the icon in your SimulinkĀ® model.

Figure 1. Block Parameters

You specify the design sample rates in MATLABĀ® vector format as shown above. Any number of outputs can be specified.