Interfaces - 2.3 English

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2023-11-08
Version
2.3 English
  • User-side segmented AXI4-Stream interface
  • Flex interface (FLEX I/F) with configurable support for:
    • 100G, 200G, and 400G OTN mapping points
    • FlexE shim PHY access
    • 64B/66B-based PCS (post-encode without rate adaptation)
    • FEC-only (RS encode/decode only; transcoding bypassed)
    • 100G, 200G, and 400G FlexO (lane deskew and RS encode/decode)
    • 128GFC (lane deskew, RS encode/decode, and transcoding)
    • 64GFC (using FEC-only and programmable logic)
  • MAC interface (MAC I/F) port which is channelized, 64B/66B-based (post-encoding) and supports the following:
    • FlexE shim access to the MAC
    • Receive client monitoring for channelized Ethernet traffic (1–40 channels)
  • AXI4-Lite interface to access the control and statistics registers
  • Transceiver interfaces for the following transceivers:
    • Up to 24 x ~25G lanes of GTY
    • Up to 24 x ~25G lanes of GTYP
    • Up to 24 x ~25G lanes of GTM
    • Up to 12 x ~50G lanes of GTM
    • Up to 6 x ~100G lanes of GTM