Error Injector - 2.4 English

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2024-08-05
Version
2.4 English

The Error injector can corrupt a fixed or random number of 10-bit symbols in each codeword. You can control the probability with which a codeword can be corrupted. The following registers can be used to control the error injector. For 100G mode, the controls given to SLICE A are applied to the codewords.

Table 1. Error Injector
Name Description
CTL_CFG_ERRINJ_<N> [4:0] ((0x0014 + N*0x0100)) The fixed number of symbol errors per codeword received by SLICE A of FEC<N> in 50G mode and by FEC<N> in 100G mode.
CTL_CFG_ERRINJ_<N> [5] ((0x0014 + N*0x0100)) Enable the injection of a fixed number of symbol errors in each codeword being received by SLICE A of FEC<N> in 50G mode and FEC<N> 100G mode.
CTL_CFG_ERRINJ_<N> [6] ((0x0014 + N*0x0100)) In case the number of symbol errors is not fixed, setting bit [6] of this register ensures that the number of errors inserted in each codeword received by FEC<N> SLICE A is always less than 16. Applies to both slices in 100G mode.
CTL_CFG_ERRINJ_<N> [15:8] ((0x0014 + N*0x0100)) The value written to bits [15:8] of this register divided by 256 is the probability with which a codeword can be corrupted. Applies to SLICE A of FEC<N> in 50G mode and FEC<N> in 100G mode.
CTL_CFG_ERRINJ_<N> [20:16] ((0x0014 + N*0x0100)) The fixed number of symbol errors per codeword received by SLICE B of FEC<N> in 50G mode. Unused in 100G mode.
CTL_CFG_ERRINJ_<N> [21] ((0x0014 + N*0x0100)) Setting bit [21] of this register enables the injection of a fixed number of symbol errors in each codeword being received by SLICE B of FEC<N> in 50G mode. Unused in 100G mode.
CTL_CFG_ERRINJ_<N> [22] ((0x0014 + N*0x0100)) In case the number of symbol errors is not fixed, setting bit [22] of this register ensures that the number of errors inserted in each codeword received by FEC<N> SLICE B is always less than 16. Unused in 100G mode.
CTL_CFG_ERRINJ_<N> [31:24] ((0x0014 + N*0x0100)) The value written to bits [31:24] of this register divided by 256 is the probability with which a codeword can be corrupted. Applies to SLICE B of FEC<N> in 50G mode. Unused in 100G mode.
  1. When an FEC instance in DCMAC is configured to 50G, both slices of the FEC operate as independent FECs.
  2. N represents the segment number. There are six (N = 0 to 5) segments for 6x100G mode.