In 50G and 100G FEC-only modes, only the RS-FEC encoder and decoder are enabled. Transcode logic, alignment logic and symbol distribution are disabled in FEC-only mode. In 100G, 200G and 400G FlexO modes transcode logic is bypassed, but alignment logic and symbol distribution are enabled.
The FEC-only and FlexO modes run at half the effective clock rate of the SerDes
(tx_serdes_clk[5:0] / rx_serdes_clk[5:0]) clock
(the actual flexif clock rate might be higher, but
enabled cycles are half the SerDes clock rate).
In the transmit direction, you must indicate the start of the codeword and then continue to provide data until the end of the codeword. No gaps are allowed other than those required by the stall within codewords. Gaps are allowed between codewords, giving you the ability to control the effective data rate.
For 50G FEC-only mode, each port supports two independent streams (the
tx_flex_stall_<N> and tx_flex_ena_<N> are
shared between them). The first stream uses tx_flex_data_<N>[159:0]
and tx_flex_start_<N>. The second stream uses
tx_flex_data_<N>[319:160] and
tx_flex_startb_<N>.
For 100G RS(528,514) FEC-only mode, because the codeword size is not an integer number of
cycles, tx_flex_startb_<N> is used to indicate when the codeword
starts in the second half of the tx_flex_data_<N> signal. This cycle
contains both the end of the first codeword and the start of the second.
tx_flex_ena_<N> must continue
to be asserted (unless indicated by tx_flex_stall_<N>) beyond the
end of the codeword. The data is ignored until the next
tx_flex_start_<N> is asserted. In FEC modes that use parallel
codewords, both codewords must be aligned.The 50G FEC-only mode can be combined with programmable logic to create a 64GFC solution in faster speed grades. Likewise, the 100G FEC-only mode can be combined with programmable logic to create a 64GFC solution (at half-density) in a wider range of speed grades.
For FEC-only modes, the latency through DCMAC depends on clock frequencies and on start-up conditions. Resetting a given port of DCMAC can result in a new latency through that port of DCMAC even if the clock frequencies remain fixed. You are encouraged to utilize the information provided by the start signals on the FlexIF and transceiver interface.
FlexO modes are similar to the raw FEC-only RS(544,514) modes, but there must be no gaps between codewords on TX, and alignment markers are indicated.
In the receive direction, valid data is indicated by the per-client
rx_flex_ena_<N>. When rx_flex_ena_<N> is
deasserted, the data is invalid. The rx_flex_ena_<N> might be
deasserted at any time, including part way through a codeword.
rx_flex_fec_rx_dout_flags_<N> (and
rx_flex_fec_rx_dout_flagsb_<N> for 50G modes) signals indicate
the codeword status flags. These arrive for every codeword. The
rx_flex_ena_<N> signal must not be used to qualify the
flags.In the transmit direction, when using FEC-only or mode for encoding, the user must pad or include the parity bits in the appropriate location. The figure below depicts the structure of a 400G FlexO frame. Note the RS FEC area - these parity bits must be set to zero for correct operation.
On the FlexIF interface, the signals tx_flex_start_N are used to indicate the
start of a row in the preceding figure. Different tx_flex_start_N
signaling is needed depending on the configured data rate.
For 400G FlexO, a new codeword pair begins every 8.5 clock cycles. The start of the new
codeword pair is signaled with tx_flex_start_0 and
tx_flex_start_2, followed 8 clock cycles later by the assertion of
tx_flex_start_1 and tx_flex_start_3. The following
figure depicts an example of a 400G FlexO RS(544,514) transfer. Note the zeroing-out of
the parity bits as described in the figure below.
For 200G FlexO, a new codeword pair begins every 17 clock cycles. The start of a new codeword
pair is signaled with tx_flex_start_0 and
tx_flex_start_1 (for client 0), tx_flex_start_2
and tx_flex_start_3 (for client 1) or tx_flex_start_4
and tx_flex_start_5 (for client 2).
For 100G FlexO, a new codeword begins every 17 clock cycles. The start of a new codeword is
signaled by tx_flex_start_N, where N is the client number.
- cycle 81: user must set tx_flex_data_0[319:40] = 280’d0
- cycle 82: user must set tx_flex_data_2[319:0] = 320’d0
- cycle 83: user must set tx_flex_data_1[319:40] = 280’d0
- cycle 84: user must set tx_flex_data_3[319:0] = 320’d0
In addition to the codeword start, the user must also indicate to the FlexIF where the
alignment markers are situated. The signal tx_flex_amflag_N is used to
indicate the position of the AM. In the example shown in the figure below, client 0 is
100G. Client 2 contains two streams of 50G. Client 4 is 200G FlexO, where
tx_flex_amflag_4 indicates the position of the alignment
marker.
In the example below, client 0 is 100G RS(528,514), with two back-to-back codewords. The
rx_flex_start_0 signal indicates when the codeword starts in the
first half of the rx_flex_data_0 bus while the
rx_flex_startb_0 signal indicates when the codeword starts in the
second half of the rx_flex_data_0 bus. Client 2 is 200G. The
rx_flex_data_2 signal contains codeword A. The
rx_flex_data_3 contains codeword B. Data after the end of the
codeword can be ignored. Client 4 is 200G FlexO and includes
rx_flex_amflag_4 to indicate the location of the alignment marker.
Because the SerDes interface runs at line rate, there must be no ignored data other than
non-enabled cycles.