Timestamp Interface - 2.4 English

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2024-08-05
Version
2.4 English

This section describes the ports relating to the operation of the IEEE 1588 Timestamping function. The timestamping interface can be coupled with Flex I/F or the AXI4-Stream interface, depending on which interface is active.

When the AXI4-Stream interface is active, the timestamping signals are clocked by the AXI clock. When the Flex I/F is active and theAXI4-Stream interface is disabled, the timestamp interface still uses the AXI clock. For this reason, the *flexif_clk should drive the *axi_clk or *core_clk ports (based on the Flex I/F configuration) when the Flex I/F is in use. For more information, see IEEE 1588 Timestamping Support