PCS Statistics TDM Ports - 2.4 English

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2024-08-05
Version
2.4 English

Statistics related to the PCS are captured on the PCS statistics time division multiplexed (TDM) interface.

Note: Signals in the following tables are clocked by the s_axi_aclk.
Table 1. PCS Statistics TDM Port Descriptions: TX Direction
Port Name I/O Description
tx_pcs_tdm_stats_data[21:0] O TDM data
tx_pcs_tdm_stats_start O Indicates the start of a new TDM cycle.
tx_tsmac_tdm_stats_valid O Validates tx_pcs_tdm_stats_start and tx_pcs_tdm_stats_data.
Table 2. PCS Statistics TDM Port Descriptions: RX Direction
Port Name I/O Description
rx_pcs_tdm_stats_data[43:0] O TDM data
rx_pcs_tdm_stats_start O Indicates the start of a new TDM cycle.
rx_pcs_tdm_stats_valid O Validates rx_pcs_tdm_stats_start and rx_pcs_tdm_stats_data.

A complete description of the statistics map and the individual statistics can be found in the Register Space section.