Attributes - 2.5 English - PG369

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2025-02-12
Version
2.5 English

The majority of the DCMAC Subsystem attributes are accessible using the AXI4-Lite interface.

CTL_RSVD4 attribute is used to enable or disable the timing arcs for Dynamic or Static configuration for the DCMAC Subsystem IP.

The values for CTL_RSVD4 are:

  • CTL_RSVD4[31:0] = 32'h0 : DYNAMIC CONFIGURATION
  • CTL_RSVD4[31:0] = 32'h1 : STATIC CONFIGURATION

Single-bit attributes are generally of type boolean string and thus should be set to "TRUE" or "FALSE" when overriding the Unisim default. The following single-bit attributes are of type binary and thus should be set to 1 or 0 when overriding the Unisim default:

  • C2_CTL_RX_DATA_RATE
  • C2_CTL_TX_DATA_RATE
  • C4_CTL_RX_DATA_RATE
  • C4_CTL_TX_DATA_RATE
  • CTL_RX_ECC_ERR_CLEAR
  • CTL_TX_ECC_ERR_CLEAR
  • CTL_TX_ECC_ERR_COUNT_TICK