Hardware Simulation - 2023.2 English

Vitis Tutorials: AI Engine (XD100)

Document ID
XD100
Release Date
2024-03-05
Version
2023.2 English

The DDC design can be built and simulated by targeting hardware using the Makefile as follows:

[shell]% cd <path-to-09-ddc_chain-dir>
[shell]% make all

The number of simulation samples mismatch compared to expected outputs is displayed. Achieved throughput for all branches against minimum requirement is also displayed.