Hardware Simulation - Hardware Simulation - 2026.1 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2026-06-23
Version
2026.1 English

You can build and simulate the DDC design by targeting hardware using the Makefile as follows:

[shell]% cd <path-to-09-ddc_chain-dir>
[shell]% make all

The simulation displays the number of samples mismatch compared to expected outputs. The simulation also displays achieved throughput for all branches against minimum requirement.