Using Vitis Analyzer to look at the Compilation and Simulation Results - 2023.2 English

Vitis Tutorials: AI Engine (XD100)

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2023.2 English

Type make aieviz to start vitis_analyzer.

Selecting Graph on the navigation bar shows a diagram of the filter implementation. It illustrates the data connectivity points into and out of the graph (128-bit interfaces), and the symmetrical FIR filter kernel being implemented on five tiles, followed by a single tile implementing the halfband filter.

Vitis Analyzer Graph

Selecting the Array option on the navigation bar shows the physical implementation of the design on the AI Engine array; with the tile’s locations being determined by the location constraints.