Upgrading Tools, Device Speed Grade, and Makefile - 2024.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2024-12-06
Version
2024.2 English

Note: Simply loading the latest version of the tools and compiling the design is not possible because the baseline Makefile has deprecated compiler options.

figure1

Important changes to the Makefile are listed below:

  • Upgrade part speed grade xcvc1902-vsva2197-1LP-e-S-es1 (previously specified by --device) to xcvc1902-vsva2197-2MP-e-S (specified by --platform). As can be seen in the following table (referenced from Versal AI Core Series Data Sheet: DC and AC Switching Characteristics (DS957)), this increases the AI Engine clock frequency from 1 GHz to 1.25 GHz.

    figure2

    Recompiling and simulating the design with this change causes the throughput to increase by around 17-25%.

  • Upgrade to use v++ unified compiler command.

  • Add support for x86 compilation and simulation.