REV1: vck190_v1_0_wrapper_timing_summary_routed.rpt - 2023.2 English

Vitis Tutorials: AI Engine (XD100)

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2023.2 English

Scroll down to the Design Timing Summary section in the timing summary report. You will see that rev1 has a WNS and TNS, which are both zero. This indicates that the rev1 build meets timing.

| Design Timing Summary
| ---------------------

    WNS(ns)      TNS(ns)  TNS Failing Endpoints  TNS Total Endpoints      WHS(ns)      THS(ns)  THS Failing Endpoints  THS Total Endpoints     WPWS(ns)     TPWS(ns)  TPWS Failing Endpoints  TPWS Total Endpoints  
    -------      -------  ---------------------  -------------------      -------      -------  ---------------------  -------------------     --------     --------  ----------------------  --------------------  
      0.069        0.000                      0              801171        0.000        0.000                      0              791955        0.000        0.000                       0                353397  

The rev0 build has a negative slack and fails timing while the rev1 build does not. During the Vitis compiler linker step, the rev0 and rev1 builds used different configuration files. A configuration file is used to specify more Vitis compiler options. The rev0 build used the config.ini file with no timing closure technique options. The rev1 build used the config_2regslice.ini file, which is similar to the config.ini but contains additional timing closure techniques. Both the *.ini files are located in Module_04_AI_Engine_and_PL_Integration/ folder. The next sections detail the config.ini file for the rev0 build, and then the changes made in the config_2regslice.ini for a successful rev1 build, which meets timing.