Enabling Profile and Trace Options - 2023.2 English

Vitis Tutorials: AI Engine (XD100)

Document ID
XD100
Release Date
2024-03-05
Version
2023.2 English

This section walks you through a flow to enable profiling and trace in the Vitis IDE. Using this, you should be able to get performance metrics, and generate trace data which can be visualized in the Vitis Analyzer.

  1. In the Flow navigator window, under AIE SIMULATION/HARDWARE, select Run Settings.

  2. Under aie_component_aiesim_1 Configuration, select the Generate Trace check box, Trace Tyep VCD, and leave the default option VCD with the filename foo.

  3. Under the Profile Options tab, enable the Generate Profile check box, and leave the other default options under that.

    NOTE: You can also try enablling profile generation for the selected tiles. profile trace run config In the Flow navigator window, under AIE SIMULATION/HARDWARE, select the Run option to launch the aiesimulation.

  4. Once the run completes, in the Flow navigator window, under AIE SIMULATION/HARDWARE, select Reports -> trace. This opens the following Vitis Analyzer window. profile trace in vitis analyzer

  5. Click the Profile ->, select the Summary and Profile Details corresponding to all the tiles ([24,0],[25,0],[25,1]), and observe the cycle count, instruction count, and program memory size. More information about the profile details is explained in the Design Performance Debug section.

  6. Click Trace, and observe the trace events corresponding to all the tiles. For example, select the core [25,0] corresponding to the kernel peak_detect. Expand the kernel function and zoom in to check the input and output values. trace kernel io

    NOTE: If the VCD file generated during AI Engine simulation is too large, it takes too much time for the Vitis Analyzer to analyze the VCD and open the trace view. Alternatively, you can do an online analysis of the VCD when running the AI Engine simulator using the WDB and CTF files. To generate this, you need to choose Online option instead of VCD in step 2.