Compiling the kernel Files Using v++ - 2023.2 English

Vitis Tutorials: AI Engine (XD100)

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2023.2 English

To work with externel traffic generators in hardware emulation,introduce hooks in the PL. For that purpose, Xilinx provides a complete set of XO files with various bitwidths in $XILINX_VITIS/data/emulation/XO :

sim_ipc_axis_master_NNN.xo with NNN in 8,16,32,64,128,256,512
sim_ipc_axis_slave_NNN.xo with NNN in 8,16,32,64,128,256,512

In this tutorial, 64 bit interfaces are required.