This register provides the Destination Address for writing to system memory for the Stream to Memory Map to DMA transfer.
Figure 1. S2MM_DA Register

Bits | Field Name | Default Value | Access Type | Description |
---|---|---|---|---|
31 to 0 | Destination Address | zeros | R/W | Indicates the destination address the AXI DMA writes to transfer
data from AXI4-Stream on S2MM Channel. Note: If Data Realignment Engine is included,
the Destination Address can be at any byte offset. If Data
Realignment Engine is not included, the Destination Address must
be S2MM Memory Map data width aligned.
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