MM2S_BUFFER_ADDRESS (MM2S Buffer Address) - 7.1 English

AXI DMA v7.1 LogiCORE IP Product Guide (PG021)

Document ID
PG021
Release Date
2024-06-20
Version
7.1 English

This value provides the pointer to the buffer of data to transfer from system memory to stream.

Figure 1. MM2S Buffer Address

Table 1. MM2S_BUFFER_ADDRESS Details
Bits Field Name Description
31 to 0 Buffer Address Provides the location of the data to transfer from Memory Map to Stream.
Note: If Data Realignment Engine is included, the Buffer Address can be at any byte offset, but data within a buffer must be contiguous. If the Data Realignment Engine is not included, the Buffer Address must be MM2S Memory Map data-width aligned.