Enable Asynchronous Clocks - 7.1 English

AXI DMA LogiCORE IP Product Guide (PG021)

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7.1 English

This setting provides the ability to operate the MM2S interface m_axi_mm2s_aclk , S2MM interface m_axi_s2mm_aclk , AXI4-Lite control interface s_axi_lite_aclk , and the Scatter Gather Interface m_axi_sg_aclk asynchronously from each other. When Asynchronous Clocks are enabled, the frequency of s_axi_lite_aclk must be less than or equal to m_axi_sg_aclk . Likewise m_axi_sg_aclk must be less than or equal to the slower of m_axi_mm2s_aclk and m_axi_s2mm_aclk . When in synchronous mode, all clocks inputs should be connected to the same clock signal. This parameter is automatically set in the Vivado IP integrator based on the clocks connected to axi_dma.

TIP: This parameter is automatically set when the IP is used in the Vivado IP integrator.