Scatter Gather Descriptor

Scatter Gather Descriptor - 7.1 English

AXI DMA LogiCORE IP Product Guide (PG021)

Document ID

PG021

Release Date

2024-06-20

Version

7.1 English

This section defines the fields of the S2MM (Receive) and MM2S (Transmit) Scatter Gather Descriptors for when the AXI DMA is configured for Scatter/Gather Mode. The descriptor is made up of eight 32-bit base words and 0 or 5 User Application words. The descriptor has future support for 64-bit addresses and support for user application data. Multiple descriptors per packet are supported through the Start of Frame and End of Frame flags. Completed status and Interrupt on Complete are also included. The Buffer Length can describe up to 67,108,863 bytes of data buffer per descriptor. Two descriptor chains are required for the two data transfer directions, MM2S and S2MM.

Table 1. Descriptor Fields (Non-multichannel Mode)
Address Space Offset¹	Name	Description
00h	NXTDESC	Next Descriptor Pointer
04h	NXTDESC_MSB	Upper 32 bits of Next Descriptor Pointer
08h	BUFFER_ADDRESS	Buffer Address
0Ch	BUFFER_ADDRESS_MSB	Upper32 bits of Buffer Address.
10h	RESERVED	N/A
14h	RESERVED	N/A
18h	CONTROL	Control
1Ch	STATUS	Status
20h	APP0	User Application Field 0²
24h	APP1	User Application Field 1
28h	APP2	User Application Field 2
2Ch	APP3	User Application Field 3
30h	APP4	User Application Field 4
Address Space Offset is relative to 16 - 32-bit word alignment in system memory, that is, 0x00, 0x40, 0x80, and so forth. User Application fields (APP0, APP1, APP2, APP3, and APP4) are only used when the Control/Status Streams are included, When the Control/Status Streams are not included, the User Application fields are not fetched or updated by the Scatter Gather Engine. The MSB fields or the upper 32-bit addresses are used only when DMA is configured for an address space greater than 32.