MM2S_BUFFER_ADDRESS_MSB (MM2S Buffer Address) - 7.1 English

AXI DMA LogiCORE IP Product Guide (PG021)

Document ID
PG021
Release Date
2024-06-20
Version
7.1 English

This value provides the upper 32 bits of pointer to the buffer of data to transfer from system memory to stream. This is used only when AXI DMA is configured for an address space greater than 32.

Figure 1. MM2S Buffer Address

Table 1. MM2S_BUFFER_ADDRESS_MSB Details
Bits Field Name Description
31 to 0 Buffer Address Provides the MSB 32 bits of the location of the data to transfer from Memory Map to Stream.