S2MM_LENGTH (S2MM DMA Buffer Length Register – Offset 58h) - 7.1 English

AXI DMA v7.1 LogiCORE IP Product Guide (PG021)

Document ID
PG021
Release Date
2024-06-20
Version
7.1 English

This register provides the length in bytes of the buffer to write data from the Stream to Memory map DMA transfer.

Figure 1. S2MM_LENGTH Register

Table 1. S2MM_LENGTH Register Details
Bits Field Name Default Value Access Type Description
25 1 to 0 Length zeros R/W Indicates the length in bytes of the S2MM buffer available to write receive data from the S2MM channel. Writing a non-zero value to this register enables S2MM channel to receive packet data.

At the completion of the S2MM transfer, the number of actual bytes written on the S2MM AXI4 interface is updated to the S2MM_LENGTH register.

Note: This value must be greater than or equal to the largest expected packet to be received on S2MM AXI4-Stream. Values smaller than the received packet result in undefined behavior.
31 to 26 Reserved 0 RO Writing to these bits has no effect and they are always read as zeros.
  1. Width of Length field determined by Buffer Length Register Width parameter. Minimum width is 8 bits (7 to 0) and maximum width is 26 bits (25 to 0).