SSIT Fence with Communication Between Isolated Modules

Isolation Design Flow for Zynq UltraScale+ MPSoCs and UltraScale+ FPGAs (XAPP1335)

Document ID
XAPP1335
Release Date
2023-05-15
Revision
2.2 English

If there is communication between the Isolated modules that are in different SLR regions, then one Isolated Pblock should include Laguna PU so the routes from one SLR will go to another SLR. The Laguna PU spans across two SLR regions. Please see the following figure.

Figure 1. Isolated Pblock with Laguna PU

The user must include the entire Laguna PU in one of the Isolated Pblock and leave valid fence around the Laguna. Please see the below image.

Figure 2. Laguna PU Inside an Isolated Pblock

In the previous figure, Blue Pblock is in SLR0 and Red Pblock is in SLR1. There is communication between the Red and Blue Modules. Blue Pblock included two Laguna PUs, which span across the two SLR regions so that routes from SLR0 will go to SLR1. In this example, SLR boundary will act as natural fence between the Red and Blue Pblocks, but there are valid fences around the two Laguna PUs in SLR1. Yellow Pblock spans across the two SLR regions and have valid fences with both Red and Blue Pblocks.