IDF + DFX Summary

This section gives high level details on how to combine IDF and DFX flows in a single design. You may refer to Vivado Design Suite Tutorial: Dynamic Function eXchange (UG947) for a detailed explanation on DFX design creation and Isolation Design Example for Zynq Ultrascale+ MPSoC Application Note (XAPP1336) for IDF design creation.

The following steps outline how to combine IDF and DFX flows in a single design.

• Follow the DFX flow by referring to Vivado Design Suite Tutorial: Dynamic Function eXchange (UG947) till the synthesis and generate synth DCPs or static top-level design and for each DFX module.
• Enable IDF flow in all the DCPs. First, open the static dcp and set HD.ISOLATED to true on the modules and save the dcp. Similarly, you may open all the RM DCPs and set HD.ISOLATED to true and then save the DCPs.
• Enable IDF DRCs by setting hd.enableIDFDRC to true. This step is not needed for Vivado version 2021.1 onwards.
• Link the entire design for the first configuration using the link_design command. Some of the IDF optimizations related to net-splitting and IO buffer insertion takes place in the link_design phase. Ensure the IDF is enables on the synth DCPs before the link_design.
• Next, floorplan the design. The best way to do is step-by-step floorplanning. First, do the floorplanning for reconfigurable partitions. Follow the guidelines from Vivado Design Suite User Guide: Dynamic Function eXchange (UG909) and Vivado Design Suite Tutorial: Dynamic Function eXchange (UG947) and draw the Pblocks for reconfigurable partitions. Run the Dynamic Function eXchange DRCs and ensure there are no DRC errors.
• Draw Pblocks for isolated modules including nested modules inside of the PR by following the IDF and IDF+DFX floorplanning guidelines mentioned in this document. You may refer to Drawing Pblocks Using Vivado GUI section for drawing Pblocks using Vivado GUI.
• Run VIV DRCs and ensure there are no warnings or errors. You may refer to Vivado Isolation Verifier User Guide (UG1291) on how to run the VIV DRCs.
• Save these Pblocks and associated properties. A script is provided with Vivado Design Suite Tutorial: Dynamic Function eXchange (UG947) design files to save the Pblocks. It is advised to save static Pblocks and RP Pblocks in a single XDC file and nested IM Pblocks inside each RM in a separate file. You may use the script with Pblocks option.
• Implement the design using the standard DFX implementation flow.
• Run VIV DRCs on implemented design. You may refer to Vivado Isolation Verifier User Guide (UG1291) on how to run VIV DRCs. Ensure there are no warnings or errors.
• Generate black box dcp and static routing dcp by following the steps from Vivado Design Suite Tutorial: Dynamic Function eXchange (UG947).