Derived Range and Snapping Mode

Derived range is the boundary of a Pblock after considering all the tiles of the Programable Units (PU) which are included in that specific Pblock. When the snapping mode property of a Pblock is set to OFF, then both derived range (calculated by internal tools), and XDC range (provided by the user), compute the same Pblock boundary. But when the Snapping Mode property of a Pblock is set to FINE_GRAINED, the derived range might differ from the user-specified XDC range. This is because, if Snapping Mode property of a Pblock is set to FINE_GRAINED and if some of the tiles of a PU are left outside in the Pblock’s XDC range, then all the tiles in that PU are completely excluded from the Pblock boundary in the derived range computation. Understanding the concept of FINE_GRAINED SNAPPING_MODE is important as IDF only works with this specific property.

In the following figure, the Pblock's snapping mode property is set to OFF, and all the tiles (irrespective of PU inclusion) are part of the Pblock. The only exceptions are the DSP and the BRAM tiles since entirety of these tiles is not inside the Pblock boundary. This can be verified by looking at the blue shaded portion in the Pblock. The DSP and BRAM tiles are not part of the Pblock because they are not highlighted; the whole tile needs to be included in the PBlock, and not part of it. It can be observed in the following figure only one of the sites of the DSP and BRAM is included, and hence the tiles that are not highlighted got excluded in the derived range computation.

Figure 1. A Pblock with SNAPPING_MODE Set to OFF

The following figure displays the same Pblock as the above figure but with the Pblock's SNAPPING_MODE set to FINE_GRAINED. It can be observed that some of the tiles have been excluded (seen by the black regions inside blue shading) from the Pblock which were previously included when snapping mode was OFF. In the following figure, those specific tiles have been excluded whose PU is partially inside the Pblock. For example, in the portion of Pblock marked with the red boxes, the CLEs got excluded because the DSP tiles and BRAM tile of the PU they are part of, are not included in the Pblock boundary. Similarly, the CLEs surrounded by green box are not included in the Pblock as they are part of a BRAM PU (the BRAM is towards the left and is not visible in the screen capture).

Figure 2. Pblock Shading with SNAPPING_MODE Set to FINE_GRAINED