Clock Root Selection

Isolation Design Flow for Zynq UltraScale+ MPSoCs and UltraScale+ FPGAs (XAPP1335)

Document ID
XAPP1335
Release Date
2023-05-15
Revision
2.2 English

The selected clock root must be able to horizontally expand to the load placement region without going out of the Isolated Pblock. User can use Tcl command to set Clock Root. Example command:

set_property USER_CLOCK_ROOT XxYy [get_nets <clock net name>]

Consider below example floorplan, where square boxes represent clock regions and the green color block represents Isolated Pblock. The right most column must be selected as the CLOCK_ROOT column when a local clock net, under Isolated module, and the loads of the clock net can be placed everywhere within the Isolated Pblock.

Figure 1. Isolated Pblock with Valid CLOCK_ROOT Selected

The results of not selecting the right-most column as CLOCK_ROOT are displayed in the following figure. In this example, the left-most column is selected as CLOCK_ROOT. The result will not adversely affect other clock loads, but the clock loads shown in the left diagram and circled in blue will be un-routable due to routing containment constraints. Routing nodes in blue dash line, shown in the right diagram, are required to route the loads in circles. However, those nodes are outside the containment region. The result will create un-routable nets or an error message is seen as: clock net does not honor routing exclusion requirement due to routing nodes.

Figure 2. Isolated Pblock with Invalid CLOCK_ROOT Selected

If the right-most column, or CLOCK_ROOT, must be avoided and the route must pass above the clock net, use the nested Pblock under the Isolated Pblock to confine clock load placement to all the available columns. Reference the following figure for more information.

The figure below displays where the created nested Pblock (shown in green) under Isolated Pblock to make sure all the clock loads are placed within the columns that are available for CLOCK_ROOT. In this case, the bottom three clock region rows.

Figure 3. Nested Pblock Within Isolated Pblock for CLOCK_ROOT Selection
Note: Support for the auto CLOCK_ROOT selection is available in DFX only flow. Support for IDF and IDF+DFX flow is planned for future releases of Vivado.