The following table shows the revision history for this document.
Section | Revision Summary |
---|---|
05/15/2023 Version 2.2 | |
Throughout document | Defined Vivado 2021.2 applications. |
Hints and Guidelines | Added new sub-sections for:
|
IDF+DFX | Added new sub-sections for Block Design Container |
03/09/2021 Version 2.1 | |
IDF+DFX | Added several new sections and images for more clarity on combined IDF+DFX flow. |
10/09/2020 Version 2.0 | |
Isolation Properties, Isolation Modules, and Communication between Isolated Modules | Added new sections for more clarity on the HD.ISOLATED and HD.ISOLATED_EXEMPTION properties. |
Derived Range and Snapping Mode | Added new sections for more clarity on how placement and routing resources are added in Pblocks. |
Mapping the Logical Ownership to the Physical Ownership | Added a new section for more clarity on link between logical and physical view for IDF flow. |
Off-Chip Communication – Input / Output Buffer Control | Added a new section for more clarity. |
Isolation Fence Fence Around Processor Subsystem for Zynq UltraScale+ Devices and Fence for SSIT Devices | Renamed Fence to Isolation Fence and added new content to clarify few key concepts with reference to Fence. |
Floorplanning: Drawing Pblocks Using Tcl Commands and Constraints | Added a new section for more clarity. |
Design Guidance, Hints and Guidelines, and IDF Rules Checklist | Added new sections to provide better understanding of IDF and its rules. |
|
Added new content to the existing sections and images for clarity and all-around enhancement to the IDF concepts in this application note. |
04/15/2019 Version 1.1 | |
Summary and Conclusion | Added coverage for the Zynq UltraScale+ MPSoC |
02/15/2019 Version 1.0 | |
Initial release. | N/A |