VIV, on the implemented design, checks the following:
IDF_VIV2-5 - Placement Violation
In contrast to IDF_VIV2-4 which checks floorplanned Pblock boundaries, IDF_VIV2-5 checks actual placement of logic on how it was implemented by the tools. Two checks are performed
- Firstly, a search for adjacent logic from distinct isolation modules is performed. In this context a placed logic is considered adjacent to another placed isolated logic if the separation between the logic placed PUs is not composed of a fence (unprogrammed) PU tiles.
- Secondly, a check is performed to determine that placed top-level logic does not form a potential path from one isolation module to another.
IDF_VIV2-6 - Routing Violation
Isolated routing must be separated by an adequate fence and trusted routing must satisfy the following:
- Inter-region routes have loads in exactly one isolation group
- No routing switches (PIPs) are used in the fence
- Inter-region routes cannot share a tile unless source regions match and load regions match
- An intra-region route cannot enter a fence tile or an isolated tile of another isolation group unless it is driven by a cell marked with the HD.ISOLATED_EXEMPT property
Note: Vivado tools automatically take care of the trusted routing and users
do not need to do anything extra other than having valid fences in their
designs.