Off-Chip Communication – Input / Output Buffer Control

Isolation Design Flow for Zynq UltraScale+ MPSoCs and UltraScale+ FPGAs (XAPP1335)

Document ID
XAPP1335
Release Date
2023-05-15
Revision
2.2 English

If an isolated module has inputs or outputs that must come from or go off-chip, these signals must have their IOBs inferred or instantiated inside an isolated module. While this is different from standard FPGA design practice, it is required in order to have control over the routing of the signals from the IOB to the function. If the IOB is not part of the isolated logic, there is no control on how the signal is routed from the IOB to that isolated logic.

Note: If an isolated module's IOB is not instantiated inside the isolated module, Vivado will automatically attempt to move the IOB into the isolated module’s netlist. A more detailed description of Vivado tools insertion of IOBs is described in Hints and Guidelines under Automatic Movement of IOB into Isolated Hierarchy.
Important: The general rule is that every physical component in the FPGA, including the IOBs, that is needed by an isolated module must be owned by its corresponding isolated Pblock. It is the responsibility of the designer to create Pblocks in such a way that it has all the resources needed by the corresponding isolated module. This implies that the IOBs needed by an isolated module must also be included in the corresponding isolated Pblock. For details on floorplanning, see the Floorplanning section.