GT Selection and Configuration Tab - 4.1 English

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2024-06-07
Version
4.1 English

The GT Selection and Configuration tab enables you to configure the serial transceiver features of the core.

Figure 1. GT Selection and Configuration Tab (Versal)
Figure 2. GT Selection and Configuration Tab (UltraScale/UltraScale+)
Table 1. GT Clocks Options
Option Values Default
GT Location
Select whether the GT IP is included in the core or in the example design

Include GT subcore in core

Include GT subcore in example design

Include GT subcore in core
GT Clocks 2
GT RefClk (In MHz) 1

161.1328125

195.3125

156.25

201.4160156

257.8125

322.265625

312.5

103.125

128.90625

206.25

309.375

161.1328125
GT DRP Clock (In MHz) 10 – 250 MHz 100.00
Core to GT Association
GT Type

GTY

GTH

GTM

GTYP

GTY
GT Selection

Options based on device/package Quad groups.

For example:

Quad X0Y1

Quad X0Y2

Quad X0Y3

...

Quad X0Y1
Lane-00 to Lane-03

Auto filled based on device/package.

For example, if Num of Core = 4, and GT Selection = Quad X0Y1, four lanes are:

X0Y4

X0Y5

X0Y6

X0Y7

 
RX Equalization Mode

Auto

LPM

DFE

Auto
RX Insertion Loss at Nyquist (dB) Depends on the GT Wizard 30
Others
Enable Pipeline Registers Checked, Unchecked Unchecked
Enable GT Interface for Board Based Design 3 Checked, Unchecked Unchecked
Enable Additional GT Control/Status and DRP Ports Checked, Unchecked Unchecked
  1. This list provides frequencies used for the default configurations. See Vivado IDE in the latest version of the tools for a complete list of supported clock frequencies for different speeds.
  2. Following are the various GT clocks supporting various devices:
    1. 10G Versal device supports 128.90625, 156.25,161.1328125, 206.25, 257.8125, 312.5, 322.265625.
    2. 25G Versal device supports 161.1328125, 103.125, 128.90625, 156.25, 206.25, 257.8125, 309.375, 312.5, 322.265625.
    3. 10G non-Versal device supports 156.25, 103.125, 128.90625, 161.1328125, 206.25, 257.8125, 309.375, 312.5, 322.265625.
    4. 25G non-Versal device supports 161.1328125, 156.25, 195.3125, 201.4160156, 257.8125, 312.5, 322.265625.
    5. Runtime switching feature supports gt_refclk frequencies 128.90625, 206.25, 257.8125, 322.265625, 156.25, 161.1328125, and 312.5 for Versal devices. For non-versal devices if runtime switching starting rate is 25G, supported gt_refclk frequencies are 161.1328125, 156.25, and 312.5. For non-versal devices if runtime switching starting rate is 10G, supported gt_refclk frequencies is 161.1328125.
  3. When selected, all the GT ports will be clubbed as a single bus interface as per GT standard interface. This will be used for board-based designs and is also suitable for the IP integrator-based connection automation flow. This will be applicable only when the GT subcore is present inside the IP core.