Resets - 4.1 English

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2024-06-07
Version
4.1 English

The following figure shows the reset structure for the 10G/25G Ethernet Subsystem MAC with PCS/PMA for non-Versal devices as implemented at the component support wrapper layer. Clocks are not shown for clarity.

Figure 1. Reset Structure (UltraScale/UltraScale+)

For Versal devices, the following figure shows the reset structure for the 10G/25G Ethernet Subsystem MAC with PCS/PMA inplemented at the component support wrapper layer.

Figure 2. Reset Structure (Versal Adaptive SoC)