Timer Register Map - 4.1 English

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID

PG210

Release Date

2024-06-07

Version

4.1 English

Table 1. Timer Register Map
Offset	Register Name	Access	Description
0x0000	TOD_CONFIG	RW	Main configuration [0] – Enable system timer A ‘0’ to this bit field disables system timer IP [1] – Enable external ToD bus Write ‘1’ to enable ToD bus signals. The overwrite mode field further defines how signaling is used This is present only when the core is generated with external ToD bus I/F support [3:2] – Overwrite Mode: 0x0 - System timer counter is not overwritten at 1-PPS event from external ToD bus 0x1 - system timer counter is overwritten with the external ToD bus seconds input at 1-PPS event from external ToD bus 0x2 - system timer counter is overwritten with value stored in the software TOD_SW_SEC_0/1 register at 1-PPS event from the external ToD bus 0x3 - Reserved The above modes are only present when the core is generated with Ext ToD bus interface support [4] – Enable Sys_timer auto-refresh. Write a ‘1’ to enable the System Timer block to automatically refresh the port-timers with the latest ToD and CTIME (if enabled) values [5] – Enable timer snapshot on external 1PPS [15:6] - Reserved [16 to 31] – Enable Port TX and RX Timers [16] = Enable Port-0 TX and RX [17] = Enable Port-1 TX and RX [18] = Enable Port-2 TX and RX [19] = Enable Port-3 TX and RX [20] = Enable Port-4 TX and RX [21] = Enable Port-5 TX and RX [22] = Enable Port-6 TX and RX [23] = Enable Port-7 TX and RX [24] = Enable Port-8 TX and RX [25] = Enable Port-9 TX and RX [26] = Enable Port-10 TX and RX [27] = Enable Port-11 TX and RX [28] = Enable Port-12 TX and RX [29] = Enable Port-13 TX and RX [30] = Enable Port-14 TX and RX [31] = Enable Port-15 TX and RX The upper limit for port number depends on the number of ports enabled at the time of generating core.
0x0004	TOD_SNAPSHOT	RW1T	[0] – Snapshot all timers Writing 1’b1 will snapshot all counters (system, external ToD bus, and all enabled ports) [31:1] - Reserved
0x0008	TOD_INTR_ENABLE	RW	Interrupt enable register [0] - 1-PPS interrupt (Master RTC sec field) [15:1] – Reserved [16] - 1-PPS interrupt (External 1pps input) [31:17] - Reserved
0x000C	TOD_INTR_STATUS	RW1C	Interrupt clear register [0] - 1-PPS interrupt (Master RTC sec field) [15:1] – Reserved [16] - 1-PPS interrupt (External 1pps input) [31:17] - Reserved
0x0010	TOD_SW_SEC_0	RW	[31:0] - Overwrite master timer’s second field bits [31:0]
0x0014	TOD_SW_SEC_1	RW	[15:0] - Overwrite master timer’s second field bits [47:32] [31:16] - Reserved
0x0018	TOD_SW_NS	RW	[29:0] - Overwrite master timer’s second field bits [31:30] - Reserved
0x001C	TOD_SW_LOAD	RW1T	[0] - Write ‘1’ initiates a load of the system timer’s ToD values from the TOD_SW_SEC_0/1, TOD_SW_NS, and TOD_SW_CTIME_0/1 registers [1] - Write ‘1’ initiates a load of the system timer’s ToD offset value from the TOD_SEC_SYS_OFFSET_0/1, and TOD_NS_SYS_OFFSET_0 registers Note: Offset is added by logic prior to system timer’s output to the port timers. As such, offset is not reflected by system timer ToD read backs. [31:2] - Reserved
0x0020	TOD_SW_CTIME_0	RW	[31:0] - Overwrite master timer’s CF field bits [31:0]
0x0024	TOD_SW_CTIME_1	RW	[30:0] - Overwrite master timer’s second field bits [63:32] [31] - Reserved
0x0028	TOD_SEC_SYS_OFFSET_0	RW	{TOD_SEC_SYS_OFFSET_1[15:0], TOD_SEC_SYS_OFFSET_0[31:0]} - Represents system timer 48b seconds field signed offset value TOD_NS_SYS_OFFSET_0[29:0] - Represents system timer 30b nano second field signed offset value Signed bit interpreted as follows for TOD_SEC_SYS_OFFSET If [47] = 1’b1 then subtract from system timer If [47] = 1’b0 then add to system timer Need to apply trigger bit [1] at register 0x001C
0x002C	TOD_SEC_SYS_OFFSET_1	RW
0x0030	TOD_NS_SYS_OFFSET_0	RW
0x0100	TOD_SYS_SEC_0	RO	[31:0] - Snapshot of system timer’s second field [31:0]
0x0104	TOD_SYS_SEC_1	RO	[15:0] - Snapshot of system timer’s second field [47:32] [31:16] - Reserved
0x0108	TOD_SYS_NS	RO	[29:0] - Snapshot of system timer’s Nano-second Field [29:0] [31:30] - Reserved
0x010C	TOD_SYS_OFFSET	RW	[31:0] - Signed offset to be applied to seconds value loaded from the external ToD bus, and to be added to 0 nanoseconds field when a 1PPS event occurs on the External ToD bus. The signed value is expressed in 2^-16 ns This is present only when the core is generated with Ext ToD Bus support
0x0110	TOD_SYS_CTIME_0	RO	[31:0] - Snapshot of system timer’s CF Field [31:0]
0x0114	TOD_SYS_CTIME_1	RO	[30:0] - Snapshot of system timer’s CF Field [63:32] [31] - Reserved
0x0120	TODBUS_SEC_0	RO	Current value of the Ext ToD bus’s second Field [31:0]
0x0124	TODBUS_SEC_1	RO	[15:0] - Current value of the Ext ToD bus’s second field [47:32] [31:16] - Reserved
0x012C	TODBUS_SYS_DIFF	RO	[31:0] - Once a second comparison of external ToD bus captured value and system Timer’s internal ToD value in signed unit of 2^-16 ns
0x0034	TOD_SYS_PERIOD_0	RW	System Timer TS clock period expressed in 2^-48 ns. For example, 3.2 ns is represented as: TOD_SYS_PERIOD_0[31:0] = 0x3333_3333 TOD_SYS_PERIOD_1[23:0] = 0x0003_3333 TOD_SYS_PERIOD_1[31:24] reserved A write to TOD_SYS_PERIOD_1 register will ‘commit’ the updated period value to the system timer.
0x0038	TOD_SYS_PERIOD_1	RW