Status Registers for 10G/25G Ethernet Subsystem - 4.1 English - PG210

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2025-01-31
Version
4.1 English

The following tables define the bit assignments for the status registers.

Some bits are sticky, that is, latching their value High or Low once set. This is indicated by the type LH (Latched High) or LL (Latched Low).

A description of each signal is found in Port Descriptions – MAC+PCS Variant.