Continuous data transfer on the transmit AXI4-Stream interface is possible, because the
tx_axis_tvalid signal can remain continuously High, with packet
boundaries defined solely by the tx_axis_tlast signal asserted for
the end of the Ethernet packet. However, the core can deassert the
tx_axis_tready acknowledgment signal to throttle the client
data rate as required. See the following two figures. The client data logic can
update the AXI4-Stream interface with valid data
while the core has deasserted the tx_axis_tready acknowledgment
signal. However, after valid is asserted and new data has been
placed on the AXI4-Stream, it should remain
there until the core has asserted the tx_axis_tready signal.
Figure 1. Back-to-Back Continuous Transfer on Transmit Client
Interface—32-bit
Figure 2. Back-to-Back Continuous Transfer on Transmit Client
Interface—64-bit
