Signal Integrity - 4.1 English

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2024-06-07
Version
4.1 English

When bringing up a board for the first time and the 10G/25G Ethernet Subsystem does not seem to be achieving word sync, the most likely problem is related to signal integrity. Signal integrity issues must be addressed before any other debugging can take place.

Signal integrity should be debugged independently from the 10G/25G Ethernet Subsystem. The following procedures should be carried out. It is assumed that the PCB itself has been designed and manufactured in accordance with the required trace impedances and trace lengths, including the requirements for skew set out in the IEEE 802.3 specification.

  • Transceiver Settings
  • Checking For Noise
  • Bit Error Rate Testing

If assistance is required for transceiver and signal integrity debugging, contact AMD technical support.