Resource Utilization - 3.1 English

UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)

Document ID
PG187
Release Date
2024-06-05
Version
3.1 English

Resource usage metrics for the SEM controller are derived from post-synthesis reports and are for budgetary purposes only. Actual resource usage might vary.

Table 1. Device Utilization – Monolithic Kintex and Virtex UltraScale and UltraScale+ Devices (Non-SSI) 1 2
Device IP Core Configuration LUTs FFs I/Os Block RAMs DSP48
UltraScale (All devices) Complete solution in Mitigation and Testing mode with no optional features. 425 490 59 4 RAMB36 1
UltraScale+ Monolithic (All devices) Complete solution in Mitigation and Testing mode with no optional features. 430 530 64 4 RAMB36 1
  1. The complete solution is the SEM controller and the logic included within the support wrapper hierarchy, which are intended to be used together. The IP is configured to its default AMD Vivado IDE option where the mode is set to Mitigation and Testing and error classification is disabled.
  2. The Vivado Design Suite debug feature IPs delivered in the top-level example design is not included. Using the Vivado Design Suite debug feature increases LUTs/FFs, but decreases I/Os.
Table 2. Device Utilization – Multi-SLR UltraScale and UltraScale+ Devices (SSI) 1 2
Device IP Core Configuration LUTs FFs I/Os Block RAMs DSP48
KU115 Complete solution in Mitigation and Testing mode with no optional features. 1,060 1,280 70 8 RAMB36 and 2 RAMB18 2
VU9P Complete solution in Mitigation and Testing mode with no optional features. 514 653 66 6 RAMB36 1
  1. The complete solution is the SEM controller and the logic included within the support wrapper hierarchy, which are intended to be used together. The IP is configured to its default Vivado IDE option where the mode is set to Mitigation and Testing and error classification is disabled.
  2. The Vivado Design Suite debug feature IPs delivered in the top-level example design is not included. Using the Vivado Design Suite debug feature increases LUTs/FFs, but decreases I/Os.