Start-Up Latency - 3.1 English

UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)

Document ID

PG187

Release Date

2024-06-05

Version

3.1 English

Start-up latency is the delay between the end of FPGA configuration and the completion of the controller initialization, as marked by entry into the Observation state. This latency is a function of the FPGA size (frame count) and the solution clock frequency.

The start-up latency is incurred only once. It is not part of the mitigation process. The following tables illustrate start-up latency, decomposed into sub-steps of boot and initialization.

Table 1. Maximum Start-up Latency at ICAP F_Max for UltraScale Devices
Device		Boot Time at ICAP F_Max (ms)	Initialization Time at ICAP F_Max (ms)
UltraScale	XCKU035	127	52
	XCKU040¹	127	52
	XCKU060	127	75
	XCKU085	127	75
	XCKU095	127	109
	XCKU115	127	75
	XCVU065	127	75
	XCVU080	127	109
	XCVU095	127	109
	XCVU125	127	75
	XCVU160	127	75
	XCVU190	127	75
	XCVU440	127	156
Measured in hardware. Data for other devices in this architecture are extrapolated based on this measurement

Table 2. Maximum Start-up Latency at ICAP F_Max for UltraScale+ Devices
Device		Boot Time at ICAP F_Max (ms)	Initialization Time at ICAP F_Max (ms)
UltraScale+	XCKU3P	127	46
	XCKU5P	127	46
	XCKU9P	127	71
	XCKU11P	127	73
	XCKU13P	127	85
	XCKU15P	127	111
	XCVU3P¹	127	84
	XCVU5P	204	137
	XCVU7P	204	137
	XCVU9P¹	204	137
	XCVU11P	204	150
	XCVU13P	204	153
	XCVU27P	204	150
	XCVU29P	204	150
	XCVU31P	127	97
	XCVU33P	127	97
	XCVU35P	204	150
	XCVU37P	204	150
	XCVU45P	204	150
	XCVU47P	204	150
	XCZU1	127	16
	XCZU2	127	16
	XCZU3	127	16
	XCZU4	127	27
	XCZU5	127	27
	XCZU6	127	71
	XCZU7	127	66
	XCZU9	127	71
	XCZU11	127	73
	XCZU15	127	85
	XCZU17	127	111
	XCZU19	127	111
UltraScale+ (Continued)	XCZU21DR	127	106
	XCZU25DR	127	106
	XCZU27DR	127	106
	XCZU28DR	127	106
	XCZU29DR	127	106
	XCZU46DR	127	106
	XCZU47DR	127	106
	XCZU48DR	127	106
	XCZU49DR	127	106
	U55N	204	150
	U55C	204	150
	XCVU57P	204	150
	XCVU19P	204	153
	XCVU15P	204	153
	XCVU23P	127	97
	XCK26	127	27
	XCUX35	127	97
	XCAU25P	127	46
	XCAU20P	127	46
	XCAU15P	127	46
	XCAU10P	127	46
	XCAU7P	127	16
Measured in hardware. Data for other devices in this architecture are extrapolated based on this measurement.

The start-up latency is the sum of the boot and initialization latency. The start-up latency at the actual frequency of operation can be estimated using data from the previous tables, and the following equation.

Figure 1. Start-Up Latency