Configuration Primitive Included in Core - 3.1 English

UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)

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3.1 English

Select this option if you do not have other logic requiring access to ICAP and FRAME_ECC primitives; next, these primitives are included in the core, and connection to and from the primitives and the SEM controller are automatically connected and not visible as core ports.

Note: This option is not available for designs targeting UltraScale SSI devices.